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INTEGRATED CIRCUITS
DATA SHEET
TDA8424 Hi-Fi stereo audio processor; I2C-bus
Product specification File under Integrated Circuits, IC02 September 1992
Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
FEATURES * Mode selector * Spatial stereo, stereo and forced mono switch * Volume and balance control * Bass, treble and mute control * Power supply with power-on reset GENERAL DESCRIPTION The TDA8424 is monolithic bipolar integrated stereo sound circuit with a loudspeaker channel facility, digitally controlled via the I2C-bus for application in hi-fi audio and television sound. QUICK REFERENCE DATA SYMBOL VCC VI Vi (S+N)/N THD cs Gvol Gtre Gbass PARAMETER positive supply voltage (pin 4) input signal handling input sensitivity with full power at the output stage signal plus noise-to-noise ratio total harmonic distortion channel separation volume control range treble control range bass control range 2 - - - - -64 -12 -12 MIN. 10.8 - 300 86 0.05 80 - - - TYP. 12.0 - - - - - +6 +12 +15 MAX. 13.2 V V mV dB % dB dB dB dB UNIT
ORDERING INFORMATION EXTENDED TYPE NUMBER TDA8424 Note 1. SOT146-1; 1996 December 3. PACKAGE PINS 20 PIN POSITION DIL MATERIAL plastic CODE SOT146(1)
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
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Fig.1 Block diagram.
Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
PINNING SYMBOL IN L VCAP IN R VCC AGND BASS R BASS R TREBLE R OUT R DGND SDA SCL OUT L TREBLE L BASS L BASS L n.c. n.c. n.c. Fig.2 Pin configuration. n.c. PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
TDA8424
DESCRIPTION left channel input decoupling capacitor right channel input positive supply voltage analog ground right channel bass control right channel bass control right channel treble control right channel output digital ground serial data input/output serial clock input left channel output left channel treble control left channel bass control left channel bass control not connected not connected not connected not connected
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
FUNCTIONAL DESCRIPTION Mode selector The mode selector selects between stereo, sound A and sound B (in the event of bi-lingual transmission) for OUT R and OUT L. Volume control and balance The volume control consists of two stages (left and right). In each part the gain can be adjusted between +6 dB and -64 dB in steps of 2 dB. An additional step allows an attenuation of 80 dB. Both parts can be controlled independently over the whole range, which allows the balance to be varied by controlling the volume of left and right output channels. Stereo, spatial stereo and forced mono mode It is possible to select three modes: stereo, spatial stereo or forced mono. The spatial stereo mode handles stereo transmissions and the forced mono can be used in the event of stereo signals. Bass control The bass control can be switched from an emphasis of 15 dB to an attenuation of 12 dB for low frequencies in steps of 3 dB. Treble control The treble control stage can be switched from +12 dB to -12 dB in steps of 3 dB. Bias and power supply The TDA8424 includes a bias and power supply stage, which generates a voltage of 0.5 VCC with a low output impedance and injector currents for the logic part. Power-on reset The on-chip power-on reset circuit sets the mute bit to active, which mutes both parts of the treble amplifier. The muting can be switched by transmission of the mute bit. I2C-bus receiver and data handling BUS SPECIFICATION The TDA8424 is controlled via the 2-wire I2C-bus by a microcontroller. The two wires (SDA - serial data, SCL - serial clock) carry information between the devices connected to the bus. Both SDA and SCL are bi-directional lines, connected to a September 1992 5
TDA8424
positive supply voltage via a pull-up resistor. When the bus is free both lines are HIGH. The data on the SDA line must be stable during the HIGH period of the clock. The HIGH or LOW state of the data line can only change when the clock on the SCL line is LOW. The set-up and hold times are specified in the AC CHARACTERISTICS. A HIGH-to-LOW transition of the SDA line while SCL is HIGH is defined as a start condition. A LOW-to-HIGH transition of the SDA line while SCL is HIGH is defined as a stop condition. The bus receiver will be reset by the reception of a start condition. The bus is considered to be busy after the start condition. The bus is considered free again after a stop condition. Module address Data transmission to the TDA8424 starts with the module address MAD.
Fig.3 TDA8424 module address.
Subaddress After the module address byte a second byte is used to select the following functions: * Volume left, volume right, bass, treble and switch functions The subaddress SAD is stored within the TDA8424. Table 1 defines the coding of the second byte after the module address MAD. The automatic increment feature of the slave address enables a quick slave receiver initialization, within one transmission, by the I2C-bus controller (see Fig.5).
Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
Table 1 Second byte after module address MAD 128 MSB FUNCTION Volume left Volume right Bass Treble 7 0 0 0 0 0 0 0 0 Switch functions 0 6 0 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 4 0 0 0 0 0 0 0 0 0 3 0 0 0 0 0 0 0 0 1 2 0 0 0 0 0 0 0 0 0 64 32 16 8 4
TDA8424
2
1 LSB
1 0 0 1 1 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0
subaddress SAD Definition of 3rd byte A third byte is used to transmit data to the TDA8424. Table 2 defines the coding of the third byte after module address MAD and subaddress SAD. Table 2 Third byte after module address MAD and subaddress SAD MSB FUNCTION Volume left Volume right Bass Treble VL VR BA TR 7 1 1 1 1 1 1 1 1 Switch functions Truth tables Tables 3, 4 and 5 are truth tables for the switch functions Table 3 Mode selector FUNCTION Stereo Sound A Sound B Note 1. Must be set to logic 1 September 1992 6 ML1 1 0 1 ML0 1 1 0 IS 1(1) 1(1) 1(1) S1 1 6 1 1 1 1 1 1 1 1 1 5 V05 V15 1 1 1 1 1 1 MU 4 V04 V14 1 1 1 1 1 1 EFL 3 V03 V13 BA3 TR3 1 1 1 1 STL 2 V02 V12 BA2 TR2 1 1 1 1 ML1 1 V01 V11 BA1 TR1 1 1 1 1 ML0 LSB 0 V00 V10 BA0 TR0 1 1 1 1 1
Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
Table 4 Stereo/spatial stereo/forced mono CHOICE Spatial stereo Stereo Forbidden status Forced mono Table 5 Mute (see note 1) MUTE Active; automatic after POR Not active Note 1. POR = Power-on reset. Tables 6, 7 and 8 are truth tables for the volume, bass and treble controls Table 6 Volume control Vx5 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 Vx4 1 1 1 1 1 1 1 1 1 1 0 0 0 1 1 1 1 Vx3 1 1 1 1 1 1 1 1 0 0 1 1 0 1 1 1 1 Vx2 1 1 1 1 0 0 0 0 1 0 1 0 0 1 1 1 0 Vx1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 STL 1 1 0 0
TDA8424
EFL 1 0 1 0
MU 1 0
2 dB/STEP (dB) 6 4 2 0 -2 -4 -6 -8 -10 -20 -30 -40 -50 -60 -62 -64 -80
Vx0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
Table 7 Bass control 3 dB/STEP (dB) 15 12 9 6 3 0 -3 -6 -9 -12 Table 8 Treble control 3 dB/STEP (dB) 12 9 6 3 0 -3 -6 -9 -12 TR3 1 1 1 0 0 0 0 0 0 TR2 0 0 0 1 1 1 1 0 0 TR1 1 0 0 1 1 0 0 1 1 BA3 1 1 1 1 0 0 0 0 0 0 BA2 0 0 0 0 1 1 1 1 0 0 BA1 1 1 0 0 1 1 0 0 1 1
TDA8424
BA0 1 0 1 0 1 0 1 0 1 0
TR0 0 1 0 1 0 1 0 1 0
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
Sequence of data transmission
TDA8424
After a power-on reset all five functions have to be adjusted with five data transmissions. It is recommended that data information for switch functions are transmitted last because all functions have to be adjusted when the muting is switched off. The sequence of transmission of other data information is not critical. The order of data transmission is shown in Figures 4 and 6. The number of data transmissions is unrestricted but before each data byte the module address MAD and the correct subaddress SAD is required.
Fig.4 Data transmission after a power-on reset.
Fig.5 Data transmission after a power-on reset with auto increment.
Fig.6 Data transmission except after a power-on reset.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
LIMITING VALUES In accordance with Absolute Maximum System (IEC 134) SYMBOL VCC Vcap VSDA, SCL VI/O IO Ptot Tamb Tstg Vstat Note supply voltage voltage range for pins with external capacitors voltage range for pins 11 and 12 voltage range at pins 1, 3, 9, 11, 12 and 13 output current at pins 9 and 13 total power dissipation at Tamb < 70 C operating ambient temperature range storage temperature range electrostatic handling PARAMETER 0 0 0 0 - - 0 -25 see note 1 MIN. 16 VCC VCC VCC 45 450 +70 +150
TDA8424
MAX. V V V V
UNIT
mA mW C C
1. Electrostatic handling Human body model: C = 100 pF, R = 1.5 k and V 3 kV; charge device model: C = 200 pF, R = 0 and V 400 V. DC CHARACTERISTICS VCC = 12 V; Tamb = 25 C; unless otherwise specified SYMBOL Supplies VCC ICC Vref VI supply voltage range supply current internal reference voltage internal voltage at pins 1 and 3 DC voltage internally generated; capacitive coupling recommended internal voltage at pins 9 and 13 at VCC = 12 V 10.8 - 5.4 - 12.0 26 0.5VCC Vref 13.2 35 6.6 - V mA V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VO
-
Vref
-
V
SDA; SCL (pins 11 and 12) VIH VIL IIH IIL HIGH level input voltage LOW level input voltage HIGH level input current LOW level input current output voltage at pins with external capacitors Vcap.n Vcap.2 pins 6 to 8, 14 to 16 pin 2 - - Vref VCC-0.3 - - V V 3.0 -3.0 - -10 - - - - VCC 1.5 +10 - V V A A
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
AC CHARACTERISTICS VCC = 12 V; bass/treble in linear position; stereo mode; spatial stereo off; RL > 10 k; CL < 1000 pF; Tamb = 25 C; unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I2C-bus timing (see Fig.7) SDA, SCL (PINS 11 AND 12) fSCL tHIGH tLOW tr tf tSU;STA tHD;STA tSU;STO tBUF tSU;DAT Inputs IN L (PIN 1) IN R (PIN 3) Vi(RMS) Ri f Outputs OUT R (PIN 9) OUT L (PIN 13) Vo(RMS) RL ZO (S+N)/N output voltage range (RMS value) load resistance output impedance signal plus noise-to-noise ratio weighted in accordance with CCIR 468-2; Vo = 600 mV - - - f = 20 Hz to 12.5 kHz Vi(RMS) = 0.3 V Vi(RMS) = 0.6 V Vi(RMS) = 2.0 V - - - 0.05 0.07 0.1 - 0.4 - % % % 78 86 68 - - - dB dB dB at Vi(max) 2 V; THD 0.7% 0.6 10 - - - - - - 100 V k input signal handling (RMS value) input resistance frequency response (0.5 dB) at Vu = -12 dB; THD 0.5% 2 20 20 - 30 - - 40 20 000 V k Hz clock frequency range clock HIGH period clock LOW period SCL rise time SCL fall time set-up time for start condition hold time for start condition set-up time for stop condition time bus must be free before a new transmission can start data set-up time 0 4 4.7 - - 4.7 4 4.7 4.7 250 - - - - - - - - - - 100 - - 1 0.3 - - - - - kHz s s s s s s s s ns
gain = 6 dB gain = 0 dB gain -20 dB THD total harmonic distortion gain = +6 dB to -40 dB gain = 0 dB to -40 dB gain = -12 dB to -40 dB
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
SYMBOL Outputs cs RR100
PARAMETER
CONDITIONS - -
MIN.
TYP. - -
MAX.
UNIT
channel separation at 10 kHz ripple rejection
gain = 0 dB fripple = 100 Hz; Vr(RMS) < 200 mV gain = 0 dB gain = 0 dB
80 50
dB dB
L
crosstalk attenuation from logic inputs to AF outputs
-
100
-
dB
Volume control (see Table 6) control range (36 steps) Gmax Gmin Gmute Gerr Gstep maximum voltage gain minimum voltage gain mute position gain tracking error; balance in mid-position step resolution gain from +6 dB to -40 dB gain from -42 dB to -64 dB Treble control (see Table 8) control range Gemp Gatt maximum emphasis at 15 kHz with respect to linear position maximum attenuation at 15 kHz with respect to linear position resolution C8-5; C14-5 = 5.6 nF 11 11 12 12 13 13 dB dB 1.5 1.0 2.0 2.0 2.5 3.0 dB/step dB/step f = 1 kHz 6 dB step -64 dB step 5 -63 -80 - 6 -64 -90 - - - - 2 dB dB dB dB
Gstep
2.5
3.0
3.5
dB/step
Bass control (see Table 7) control range Gemp Gatt Gstep maximum emphasis at 40 Hz with respect to linear position maximum attenuation at 40Hz with respect to linear position resolution C6-7; C15-16 = 33 nF 14 11 2.5 - 15 12 3.0 16 13 3.5 - dB dB dB/step
Spatial function antiphase crosstalk 52 %
Note to the characteristics 1. Balance is obtained via software by different volume settings in both channels (left and right).
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
tSU; STA = start code set-up time. tHD; STA = start code hold time. tSU; STO = stop code set-up time.
tBUF = bus free time. tSU; DAT = data set-up time. tHD; DAT = data hold time.
Fig.7 Timing requirements for I2C-bus.
Fig.8 Input signal handling capability; gain = -10 dB; RS = 600 ; RL = 10 k; bass/treble = 0 dB; VCC = 12 V.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
Fig.9
Input signal handling capability plotted against gain setting; THD = -60 dB; f = 1 kHz; RS = 600 ; RL = 10 k; bass/treble = 0 dB; VCC = 12 V.
Fig.10 Output signal handling capability; gain = 6 dB; RS = 600 ; RL = 10 k; bass/treble = 0 dB; VCC = 12 V.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
(1) gain = 0 dB; Vi = 1.0 V. (2) gain = 6 dB; Vi = 0.5 V.
Fig.11 Stereo channel separation as a function of frequency; RS = 0 ; RL = 10 k; bass/treble = 0 dB; VCC = 12 V.
Fig.12 Mute signal rejection as a function of frequency; gain = 0 dB; Vi = 1.0 V; RS = 0 ; RL = 10 k; bass/treble = 0 dB; VCC = 12 V.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
Fig.13 Ripple rejection as a function of frequency; Vripple = 0.3 V (RMS); RS = 0 ; RL = 10 k; bass/treble = 0 dB; VCC = 12 V.
Fig.14 Noise output voltage as a function of gain; weighted CCIR 468 quasi peak gain, +6 dB to -64 dB; Vi = 0 V; RS = 0 ; RL = 10 k; bass/treble = 0 dB; VCC = 12 V.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
Fig.15 Frequency response of bass and treble control; bass and treble gain settings = -12 dB to +15 dB; gain = 0 dB; Vi = 0.1 V; RS = 600 ; RL = 10 k; VCC = 12 V.
Fig.16 Tone control with T-filter.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
Fig.17 Tone control.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
Fig.18 Turn-on behaviour; C = 2.2 F; RL = 10 k.
Fig.19 Turn-off behaviour; without modulation.
Fig.20 Turn-off behaviour; with modulation (shaded area).
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
ICC = 25 mA Iload = 239 mA ton = 15 ms toff = 110 ms
Fig.21 Turn-on/off power supply circuit diagram.
Fig.22 Level diagram.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
TDA8424
Fig.23 Test and application circuit diagram.
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
PACKAGE OUTLINE DIP20: plastic dual in-line package; 20 leads (300 mil)
TDA8424
SOT146-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 20 11 MH wM (e 1)
pin 1 index E
1
10
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.10
e1 7.62 0.30
L 3.60 3.05 0.14 0.12
ME 8.25 7.80 0.32 0.31
MH 10.0 8.3 0.39 0.33
w 0.254 0.01
Z (1) max. 2.0 0.078
26.92 26.54 1.060 1.045
6.40 6.22 0.25 0.24
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC EIAJ SC603 EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-05-24
September 1992
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Philips Semiconductors
Product specification
Hi-Fi stereo audio processor; I2C-bus
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8424
with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
September 1992
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